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 Charge Pump Regulator for Color TFT Panels ADM8839
FEATURES 3 Voltages (+5 V, +15 V, -15 V) from a Single 3 V Supply Power Efficiency Optimized for Use with TFT in Mobile Phones Low Quiescent Current Low Shutdown Current (<5 A) Shutdown Function Option to Use External LDO APPLICATIONS Hand-held Instruments TFT LCD Panels Cellular Phones FUNCTIONAL BLOCK DIAGRAM
C5, 2.2 F VCC
ADM8839
C1+ VOLTAGE DOUBLER C1- C1, 2.2 F
VOUT LDO_IN OSCILLATOR LDO VOLTAGE REGULATOR C6, 2.2 F +5VOUT +5VIN C2+ C2- C3+ C3- C3, 0.22 F +15V C8, 0.22 F C4, 0.22 F
LDO_ON/OFF
CONTROL LOGIC
+5V C7, 2.2 F
DOUBLE VOLTAGE TRIPLER TRIPLE TIMING GENERATOR
C2, 0.22 F
+15VOUT C4+ SHDN SHUTDOWN CONTROL DISCHARGE VOLTAGE INVERTER C4-
-15VOUT GND
-15V C9, 0.22 F
GENERAL DESCRIPTION
The ADM8839 is a charge pump regulator used for color thin film transistor (TFT) liquid crystal displays (LCDs). Using charge pump technology, the device can be used to generate three voltages (+5 V 2%, +15 V, -15 V) from a single 3 V supply. These voltages are then used to provide supplies for the LCD controller (5 V) and the gate drives for the transistors in the panel (+15 V and -15 V). Only a few external capacitors are needed for the charge pumps. An efficient low dropout (LDO) voltage regulator ensures that the power efficiency is high and provides a low ripple 5 V output. This LDO can be shut down and an external LDO can be used to regulate the 5 V doubler output and drive the input to the charge pump section that generates the +15 V and -15 V outputs, if required by the user.
The ADM8839 has a power save shutdown feature. The 5 V output consumes the most power, so power efficiency is also maximized on this output with an oscillator enabling scheme (Green IdleTM). This effectively senses the load current that is flowing and turns on the charge pump only when charge needs to be delivered to the 5 V pump doubler output. The ADM8839 is fabricated using CMOS technology for minimal power consumption. The part is packaged in a 20-lead LFCSP (lead frame chip scale package).
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved.
ADM8839-SPECIFICATIONS
Parameter INPUT VOLTAGE, VCC SUPPLY CURRENT, ICC +5 V OUTPUT Output Voltage Output Current Output Ripple Transient Response +15 V OUTPUT Output Voltage Output Current Output Ripple -15 V OUTPUT Output Voltage Output Current Output Ripple POWER EFFICIENCY Test Conditions
(VCC = 3 V - 10%, 40%; TA = -40 C to +85 C; C1, C5, C6, C7 = 2.2 F; C2, C3, C4, C8, C9 = 0.22 F; unless otherwise noted.)
Min 2.7 Typ Max 4.2 250 500 5 5.1 8 Unit V A A V mA mV p-p s V A mV p-p V A mV p-p %
Unloaded Shutdown Mode, TA = 25C IL = 10 A to 8 mA 8 mA Load IL Stepped from 10 A to 8 mA IL = 1 A to 150 A IL = 100 A IL = -1 A to -150 A IL = -100 A R5VOUT Load = 5 mA, 15 V Load = 150 A, VCC = 3.0 V 60 SHDN Low = Shutdown Mode SHDN High = Normal Mode -16.0 -150 14.0 4.9
5.0 5 10 5 15.0 1 50 -15.0 -1 50 82
16.0 150
-14.0
CHARGE PUMP FREQUENCY CONTROL PINS, SHDN Input Voltage, VSHDN Digital Input Current Digital Input Capacitance* LDO_ON/OFF Input Voltage Digital Input Current Digital Input Capacitance*
*Guaranteed by design. Not 100% production tested. Specifications are target values and are subject to change without notice.
100
140 0.3 VCC
kHz V V A pF V V A pF
0.7
VCC 1 10
Low = External LDO High = Internal LDO
0.3 0.7 VCC 1 10
VCC
TIMING SPECIFICATIONS
Parameter POWER-UP SEQUENCE +5 V Rise Time, tR5V +15 V Rise Time, tR15V -15 V Fall Time, tFM15V Delay between -15 V Fall and +15 V, tDELAY POWER-DOWN SEQUENCE +5 V Fall Time, tF5V +15 V Fall Time, tF15V -15 V Rise Time, tRM15V
(VCC = 3 V, TA = 25 C; C1, C5, C6, C7 = 2.2 F; C2, C3, C4, C8, C9 = 0.22 F.)
Test Conditions/Comments 10% to 90%, Figure 1 10% to 90%, Figure 1 90% to 10%, Figure 1 Figure 1 90% to 10%, Figure 1 90% to 10%, Figure 1 10% to 90%, Figure 1 Min Typ 250 3 3 600 35 10 20 Max Unit s ms ms s ms ms ms
Specifications are subject to change without notice.
-2-
REV. A
ADM8839
ABSOLUTE MAXIMUM RATINGS*
(TA = 25C, unless otherwise noted.)
THERMAL CHARACTERISTICS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6.0 V Input Voltage on Digital Inputs . . . . . . . . . . . -0.3 V to +6.0 V Output Short-Circuit Duration to GND . . . . . . . . . . . . . 10 sec Output Voltage +5 V Output . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7.0 V -15 V Output . . . . . . . . . . . . . . . . . . . . . . . . -17 V to +0.3 V +15 V Output . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +17 V Operating Temperature Range . . . . . . . . . . . . -40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mW Storage Temperature Range . . . . . . . . . . . . . -65C to +150C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class I
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
20-Lead LFCSP Package: JA = 31C/W
ORDERING GUIDE
Model ADM8839ACP
Temperature Range -40C to +85C
Package Option CP-20
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM8839 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. A
-3-
ADM8839
PIN CONFIGURATION
20 C1 19 C1 18 GND 17 15VOUT 16 C4 VCC 1 VOUT 2 LDO_IN 3 5VOUT 4 5VIN 5
PIN 1 INDICATOR
ADM8839
TOP VIEW
15 C4 14 C2 13 C2 12 C3 11 C3
PIN FUNCTION DESCRIPTIONS
Pin No. 1 2 3 4 5 6
Mnemonic VCC VOUT LDO_IN +5VOUT +5VIN LDO_ON/OFF
Function Positive Supply Voltage Input. Connect this pin to the 3 V supply with a 2.2 F decoupling capacitor. Voltage Doubler Output. This was derived by doubling the 3 V supply. A 2.2 F capacitor to ground is required on this pin. Voltage Regulator Input. The user may bypass this circuit by using the LDO_ON/OFF pin. 5 V Output. This was derived by doubling and regulating the 3 V supply. A 2.2 F capacitor to ground is required on this pin to stabilize the regulator. 5 V Input. This is the input to the voltage tripler and inverter charge pump circuits. Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into the voltage tripler and inverter circuits of the ADM8839. Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing generator and enables the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V. Connect this pin to VCC. Connect this pin to GND. 15 V Output. This was derived by tripling the 5 V regulated output. A 0.22 F capacitor is required on this pin. External capacitor C3 is connected between these pins. A 0.22 F capacitor is recommended. External capacitor C2 is connected between these pins. A 0.22 F capacitor is recommended. External capacitor C4 is connected between these pins. A 0.22 F capacitor is recommended. -15 V Output. This was derived by tripling and inverting the 5 V regulated output. A 0.22 F capacitor is required on this pin. Device Ground. External capacitor C1 is connected between these pins. A 2.2 F capacitor is recommended.
7
SHDN
8 9 10 11, 12 13, 14 15, 16 17 18 19, 20
VCC GND +15VOUT C3-, C3+ C2-, C2+ C4-, C4+ -15VOUT GND C1-, C1+
LDO_ON/OFF 6 SHDN 7 VCC 8 GND 9 15VOUT 10
-4-
REV. A
Typical Performance Characteristics-ADM8839
5.10 5.05 5.00 DEVICE AT +25 C DEVICE AT +85 C
LDO POWER EFFICIENCY - %
84 83 82 81 80 79 78 77 76 75 2.9 3.1 3.3 3.5 3.7 SUPPLY VOLTAGE - V 3.9 4.1 4.2 1 2 3 4 5 6 7 8 LOAD CURRENT - mA
LDO O/P VOLTAGE - V
4.95 DEVICE AT -40 C 4.90 4.85 4.80 4.75 4.70 2.7
TPC 1. LDO O/P Voltage Variation over Temperature and Supply
5.020
TPC 4. LDO Power Efficiency vs. Load Current, VCC = 3 V
400
5.015
LDO O/P VOLTAGE - V
A
350
5.010
SUPPLY CURRENT -
300
5.005
250
5.000
200
4.995 0 1 2 3 4 ILOAD - mA 5 6 7 8
150 2.7
2.9
3.1
3.3
3.5
3.7
3.9
4.1 4.2
SUPPLY VOLTAGE - V
TPC 2. LDO O/P Voltage vs. Load Current
100
TPC 5. Supply Current vs. Supply Voltage
15.1 15.0
+15V/-15V POWER EFFICIENCY - %
90
14.9
OUTPUT VOLTAGE - V
80
14.8 +15V AT 25 C 14.7 14.6 14.5 14.4 14.3 -15V AT 25 C
70
60
50
40
14.2
30 10 20 30 40 50 ILOAD - 60 A 70 80 90 100
14.1 0 50 100 ILOAD - A 150 200
TPC 3. +15 V/-15 V Power Efficiency vs. Load Current
TPC 6. +15 V/-15 V Output Voltage vs. Load Current, Typical Configuration
REV. A
-5-
ADM8839
+15V OUTPUT
LOAD ENABLE
5V OUTPUT
-15V OUTPUT 5VOUT
TPC 7. +15 V and -15 V Outputs at Power-Up
TPC 10. Output Transient Response for Maximum Load Current
VOUT RIPPLE (DOUBLER OUTPUT RIPPLE)
+15V OUTPUT
LDO OUTPUT RIPPLE
VCC RIPPLE -15V OUTPUT
5VOUT
TPC 8. Output Ripple on LDO (5 V Output)
TPC 11. +15 V and -15 V Outputs at Power-Down
LOAD DISABLE
5V OUTPUT
TPC 9. 5 V Output Transient Response, Load Disconnected
-6-
REV. A
ADM8839
POWER SEQUENCING
In order for the TFT panel to power up correctly, the gate drive supplies must be sequenced such that the -15 V supply is up before the +15 V supply. The ADM8839 controls this sequence. When the device is turned on (a logic high on SHDN), the ADM8839 allows the -15 V output to ramp immediately but holds off the +15 V output. It continues to do this until the negative output has reached -3 V. At this point, the positive output is enabled and allowed to ramp to +15 V. This sequence is highlighted in Figure 1.
VCC
C5, 2.2 F VCC
ADM8839
C1+ VOLTAGE DOUBLER C1- C1, 2.2 F
VOUT LDO_IN OSCILLATOR LDO VOLTAGE REGULATOR C6, 2.2 F +5VOUT +5VIN C2+ C2- C3+ C3- C3, 0.22 F +15V C8, 0.22 F C2, 0.22 F +5V C7, 2.2 F
LDO_ON/OFF
CONTROL LOGIC
DOUBLE VOLTAGE TRIPLER TRIPLE TIMING GENERATOR
SHDN
tR5V
90% +5V 10%
+15VOUT C4+ SHDN SHUTDOWN CONTROL DISCHARGE VOLTAGE INVERTER C4-
tF5V
C4, 0.22 F
tR15V
90% +15V 10%
-15VOUT
-15V C9, 0.22 F
tF15V
GND
tDELAY
-15V 90% 10% -3V
Figure 2. Typical Configuration
tRM15V
15.1 15.0
tFM15V
OUTPUT VOLTAGE - V
14.9 14.8 +15V AT 25 C 14.7 14.6 14.5 14.4 14.3 14.2 14.1 0 50 100 ILOAD - A 150 200 -15V AT 25 C
Figure 1. Power Sequence
TRANSIENT RESPONSE
The ADM8839 features extremely fast transient response, making it very suitable for fast image updates on TFT LCD panels. This means that even under changing load conditions, there is still very effective regulation of the 5 V output. TPCs 9 and 10 show how the 5 V output responds when a maximum load is dynamically connected and disconnected. Note that the output settles within 5 s to less than 1% of the output level.
BOOSTING THE CURRENT DRIVE OF THE 15 V SUPPLY
The ADM8839 15 V output can deliver 150 A of current in the typical configuration, as shown in Figure 2. It is also possible to draw 100 A from the +15 V output and 200 A from the -15 V output, or vice versa. It is possible to draw only a maximum of 300 A combined from both the +15 V and the -15 V outputs at any time (see Figure 3). In this configuration, +5VOUT (Pin 4) is connected to +5VIN (Pin 5), as shown in the Functional Block Diagram.
Figure 3. +15 V/-15 V Output Voltage vs. Load Current, Typical Configuration
REV. A
-7-
ADM8839
It is possible to configure the ADM8839 to supply up to 400 A on the 15 V outputs by changing its configuration slightly, as shown in Figure 4. The configuration in Figure 4 can supply up to 400 A of current on both the +15 V and the -15 V outputs. If the load on the 15 V does not draw any current, the voltage on the 15 V outputs can rise up to 16.5 V (see Figure 5). In this configuration, VOUT (Pin 2) is connected to +5VIN (Pin 5).
C03075-0-2/03(A)
400 500 17.0
C1+ VOLTAGE DOUBLER C1- C1, 2.2 F CURRENT BOOST CONFIGURATION CONNECTION C6, 2.2 F +5VOUT +5VIN LDO_ON/OFF DOUBLE VOLTAGE TRIPLER TRIPLE TIMING GENERATOR C2+ C2- C3+ C3- C3, 0.22 F C2, 0.22 F +5V C7, 2.2 F
C5, 2.2 F VCC
ADM8839
16.5 OUTPUT VOLTAGE - V
VOUT LDO_IN OSCILLATOR LDO VOLTAGE REGULATOR
+15V AT 25 C
16.0 -15V AT 25 C 15.5
CONTROL LOGIC
15.0
14.5
+15VOUT C4+ SHDN SHUTDOWN CONTROL DISCHARGE VOLTAGE INVERTER C4-
14.0
+15V C8, 0.22 F
0
100
200 ILOAD -
300 A
C4, 0.22 F
Figure 5. +15 V/-15 V Output Voltage vs. Load Current, Current Boost Configuration
-15VOUT GND
-15V C9, 0.22 F
Figure 4. Current Boost Configuration
OUTLINE DIMENSIONS 20-Lead Leadframe Chip Scale Package [LFCSP] 4 4 mm Body (CP-20)
Dimensions shown in millimeters
4.0 BSC SQ 0.60 MAX PIN 1 INDICATOR
TOP VIEW
0.60 MAX
16 15
20 1
3.75 BSC SQ 0.75 0.55 0.35
11 10
BOTTOM VIEW
6 5
2.25 2.10 SQ 1.95
12 MAX 1.00 0.90 0.80 SEATING PLANE 0.50 BSC
1.00 MAX 0.65 NOM 0.05 0.02 0.00
0.30 0.23 0.18 COPLANARITY 0.08
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1
Revision History
2/03 - Data Sheet Changed from Rev. 0 to Rev. A
Changed SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 -8-
PRINTED IN U.S.A.


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